[PCIE] PCIE LINK SPEED

PCIE Configuration space

Offset	Description
0x06	BIT4=1 Support Capability
0x34	Point to Capability Struct

Capability Struct
Offset	Description
0x00	CapabilityID 0x01 = PCI_CAP_ID_PMI 0x02 = PCI_CAP_ID_AGP 0x03 = PCI_CAP_ID_VPD 0x04 = PCI_CAP_ID_SLOTID 0x05 = PCI_CAP_ID_MSI 0x06 = PCI_CAP_ID_HOTSWAP 0x07 = PCI_CAP_ID_PCIX 0x10 = PCI_CAP_ID_PCIEXP 0x0C = PCI_CAP_ID_HOTPLUG
0x01	NextCapabilityStruct

PCIEXP Capability Struct
Offset	Width	Description
0x02	16bit	PCIE Capability [3:0] Capability Version 1 – Capability Version 1 Support 2 – Capability Version 2 Support
0x04	32bit	Device Capability [2:0] Max_Payload_Size SupportedDefined encodings are: 000b 128 bytes max payload size 001b 256 bytes max payload size 010b 512 bytes max payload size 011b 1024 bytes max payload size 100b 2048 bytes max payload size 101b 4096 bytes max payload size
0x0C	32bit	Link Capability [3:0] Max Link Speed (RO) 0001b Supported Link Speeds Vector field bit 0 0010b Supported Link Speeds Vector field bit 1 0011b Supported Link Speeds Vector field bit 2 0100b Supported Link Speeds Vector field bit 3 0101b Supported Link Speeds Vector field bit 4 0110b Supported Link Speeds Vector field bit 5 0111b Supported Link Speeds Vector field bit 6 [9:4] Maximum Link Width (RO) 000000b Reserved 000001b x1 000010b x2 000100b x4 001000b x8 001100b x12 010000b x16 100000b x32
0x10	16bit	Link Control [5] Retrain Link
0x12	16bit	Link Status Register [3:0] Current Link Speed 0001b Supported Link Speeds Vector field bit 0 0010b Supported Link Speeds Vector field bit 1 0011b Supported Link Speeds Vector field bit 2 0100b Supported Link Speeds Vector field bit 3 0101b Supported Link Speeds Vector field bit 4 0110b Supported Link Speeds Vector field bit 5 0111b Supported Link Speeds Vector field bit 6 [9:4] Negotiated Link Width 00 0001b x1 00 0010b x2 00 0100b x4 00 1000b x8 00 1100b x12 01 0000b x16 10 0000b x32
0x24	32bit	Device Capability 2
0x28	16bit	Device Control 2
0x2C	32bit	Link Capability 2 [7:1] Supportd Link Speeds Vector Bit definitions within this field are: Bit 0 2.5 GT/s Bit 1 5.0 GT/s Bit 2 8.0 GT/s Bits 6:3 RsvdP IMPLEMENTATION NOTE Software Management of Link Speeds With Earlier Hardware. Hardware components compliant to versions of the Base Specification prior to Revision 3.0 either did not implement the Link Capabilities 2 register, or the register was Reserved. For software to determine the supported Link speeds for components where the Link Capabilities 2 register is either not implemented, or the value of its Supported Link Speeds Vector is 0000000b, software can read bits 3:0 of the Link Capabilities register (now defined to be the Max Link Speed field), and interpret the value as follows: 0001b 2.5 GT/s Link speed supported 0010b 5.0 GT/s and 2.5 GT/s Link speeds supported For such components, the encoding of the values for the Current Link Speed field (in the Link 10 Status register) and Target Link Speed field (in the Link Control 2 register) is the same as above.
0x30	32bit	Link Control 2 [3:0] Target Link Speed Defined encodings are: 0001b Supported Link Speeds Vector field bit 0 0010b Supported Link Speeds Vector field bit 1 0011b Supported Link Speeds Vector field bit 2 0100b Supported Link Speeds Vector field bit 3 0101b Supported Link Speeds Vector field bit 4 0110b Supported Link Speeds Vector field bit 5 0111b Supported Link Speeds Vector field bit 6

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